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Silicon Labs /EFR32MG24A110F1536GM48 /MODEM_S /ADPC9

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Interpret as ADPC9

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADBBSSAMPAVGLIM0ADBBSSAMPTHR0 (DISABLE)ADBBSSSYNCEN 0ADBBSSUPTHR 0ADBBSSDNTHR

ADBBSSSYNCEN=DISABLE

Description

No Description

Fields

ADBBSSAMPAVGLIM

ADBBSSAMPAVGLIM
ADBBSSAMPTHR

ADBBSSAMPTHR
ADBBSSSYNCEN

Enable sync of BBSS

0 (DISABLE): Do not synchronize BBSS to antenna switching

1 (ENABLE): Synchronize BBSS to anetnna switching
ADBBSSUPTHR

BBSS increase threshold
ADBBSSDNTHR

BBSS decrease threshold

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data